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Assembly code level power optimization for partitioned memory architectures
Assembly code level power optimization for partitioned memory architectures
2004
Ronit Ben-Bassat Levy
Bhagirath Narahari
Rahul Simha
Keywords:
Parallel computing
Computer architecture
Interleaved memory
Flat memory model
Physical address
Overlay
Uniform memory access
Memory protection
Computer science
Shared memory
Computing with Memory
Correction
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