A large capacity cryoelectric memory with cavity sensing

1963 
This paper describes a cryoelectric high speed Continuous Sheet Memory (CSM) with 16,384 bit locations and complete cryotron addressing matrices. This memory is of the coincident current, random access type. The entire memory plane is fabricated via vacuum deposition techniques and is contained on a 2 inch by 2 inch substrate. In addition to a planar density of 10,000 bits per square inch, and complete cryotron decoding trees, the memory contains a novel sense structure in the form of a geometrical cavity. In addition to other advantages, the new cavity sense eliminates the major alignment problems. In one type of organization, each substrate or memory plane may be regarded as comprising the n th bit of 16,384 words; all n bits of a word may be read out in a parallel manner. Thus a word length is equal to the number of memory planes. This number of planes is at the discretion of the designer. The continuous sheet memory structure with decoding matrices and cavity sense offers a potential means toward the physical realization of a high speed random access memory of a capacity beyond a billion bits with present day technology. Since all present day computers of general utility are memory limited, the complexity of the mathematical operations performed by these computers is restricted by the size and/or access time of the memory. This restriction is indicative that large capacity high speed memories will play a major role in future computers. Many studies have been made of possible techniques that can be utilized for high speed, large capacity random access memories. These techniques have been in the areas of magnetics, semiconductors, and superconductivity. Microminiature magnetic cores, magnetic metal sheets, and deposited magnetic film show high promise toward the realization of a high speed random access medium capacity memory of about 10 7 bits, but do not appear to show promise toward large capacity memories of the order of 10 9 bits. Semiconductors, including transistors and tunnel diodes, also indicate a similar capability toward high speed memories of medium capacity. The present art of transistors is indicative that a very large array of the latter would be costly and cumbersome. Tunnel diodes are two terminal devices and have a relatively complicated memory cell structure. In addition such memories suffer an unavoidable delay due to the high amplification necessary because of signal attenuation; the latter is proportional to the number of words in the memory. A semiconductor device which has been proposed is the cryosar. This device is a two terminal element and awaits future development. In the area of superconductors, film cryotrons and persistors do not appear to offer the potential toward realizing a very large capacity memory of the order of 10 9 bits. The former has a relatively small bit density and registration difficulties; reasonably high uniformity is required and its relatively large power dissipation in large arrays places an upper bound on the number of cryotrons which may be utilized with present day technology. In addition, an inherent gain problem exists. A major disadvantage of the persister is the incomplete shielding which exists between the sense and drive lines. Thus arrays of only limited size can be made. A two-hole memory cell described by J. W. Crowe in 1957 was anticipated to hold high promise towards the realization of a high speed large capacity memory until it was found that the two-hole cell had an inherent uniformity problem due to the strong dependence of the critical field on the nature and edges of the holes. The continuous sheet memory eliminates the holes of the two-hole memory cell and with the cavity sense geometry represents perhaps the first realistic solution towards the physical realization of a practical high speed random access memory with a capacity in excess of a billion bits. This CSM with cavity sense eliminates the major registration problems encountered with present memory packing densities of 10,000 bits per square inch. In addition, the cryotron decoding matrices are an integral part of the CSM structure. Interrogation of the memory results in negligible power dissipation and no half-select noise has been observed. Present forms of the CSM have a signal-to-noise ratio of about 20:1 and low drive current requirements.
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