Front-end electronics for PHENIX time expansion chamber

Front-end electronics (FEE) has been developed for the PHENIX time expansion chamber (TEC), a multi-wire tracking detector with over 20k readout channels. The FEE for the TEC consists of an analog preamplifier shaping amplifier circuit board, a digital front-end module circuit board plus ancillary support boards for timing, control and communication. Signals from each chamber wire are sampled (/spl sim/40 MHz), digitized, buffered, and then formatted as 64 channel serial data packets to be transmitted via 1 GHz optical link. Three custom IC's have been designed for this system: 1) octal preamplifier and shaping amplifier with tail cancellation and dual-gain for large dynamic range with full serial control of gain, shaping time and tail; 2) nonlinear 5 bit flash-ADC with 9 bit dynamic range; 3) digital memory unit for programmable delay and memory depth. The FEE has been installed, commissioned and operated in the PHENIX experiment at Brookhaven National Laboratory.