An asynchronous delta-sigma converter implementation

In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction algorithm can mathematically perfectly reconstruct the original signal only using timing events. A prototype circuit designed and fabricated in a standard 0.5/spl mu/m CMOS process with a 5V power supply is presented. The tests show that an 8-bit resolution with 6kHz signal bandwidth and only 715 /spl mu/W power consumption is possible.