Improving performance of logical qubits by parameter tuning and topology compensation

Optimization or sampling of arbitrary pairwise Ising models, in a quantum annealing protocol of constrained interaction topology, can be enabled by a minor-embedding procedure. The logical problem of interest is transformed to a physical (device programmable) problem, where one binary variable is represented by a logical qubit consisting of multiple physical qubits. In this paper we discuss tuning of this transformation for the cases of clique, biclique, and cubic lattice problems on the D-Wave 2000Q quantum computer. We demonstrate parameter tuning protocols in a variety of problems, focusing on anneal duration, chain strength, and post-processing. Inhomogeneities in coupling strength between logical qubits arising from minor embedding are shown to be mitigated by efficient strategies accounting for logical qubit topology.