Non-iterative method for finding optimised switching sequence to compensate gradient errors in current-steered DAC

A methodology to find the optimised switching sequence for gradient error compensation in the current cell array of current-steered digital-to-analogue converters (DACs) is presented. This new approach is simplified to be non-iterative and generalised to both linear and quadratic gradient errors. Simulation results show that the approach finds the optimised switching sequence to substantially reduce the nonlinearity of DACs due to the gradient errors.