Differential Via Designs for Crosstalk Reduction in High-Speed PCBs

With an increased data rate of high-speed PCBs, an increase in crosstalk degrades the signal integrity of the highspeed system. In most PCB designs, via-to-via coupling has the largest impact on crosstalk. Until now, multiple PCB design methods for crosstalk mitigation are proposed under the IC pin field area, such as increasing the distance between signal pairs, adding more ground vias in between the signal vias and placing signal pairs orthogonal to each other. However, such methods sacrifice the signal to ground (S:G) ratio and require a change in the IC package ball map. In this paper, two different via designs are proposed to reduce crosstalk without sacrificing the S:G ratio, while maintaining the package ball maps. In the first proposed design, crosstalk is mitigated through tilted drilling, where the vias are drilled with 45 degrees angle on the PCB. Differential via pairs located in different rows achieves orthogonality for crosstalk cancellation when viewed from the horizontal cross-section. In the second proposed design, additional intermediate vias are designed to achieve orthogonality between differential via pairs without changing the IC package ball map or the drilling direction. Using a 3D full-wave simulation tool, the two prosed designs are simulated. Simulation results demonstrate that both designs decrease in crosstalk with negligible change in insertion loss and return loss compared to the conventional via design up to 30 GHz range. The proposed methods can be directly applied to lower the crosstalk in the existing high-speed PCBs with minor adjustments in the PCB design while maintaining the same IC packages.