An in-situ temperature-sensing interface based on a SAR ADC in 45nm LP digital CMOS for the frequency-temperature compensation of crystal oscillators

Multi-radio (3G/4G/GPS) mobile communication devices impose stringent requirements (≪1ppm) on a crystal oscillator's (XO) frequency stability over a wide temperature range (≫100°C). Furthermore, these devices often subject their internal XOs to sudden temperature ramps caused by power switching during sporadic user activities. In order for applications such as GPS to maintain satellite acquisition under such conditions, a low XO frequency drift rate with temperature (≪50ppb/°C) is strongly desired. Traditionally, a discrete analog temperature-compensated XO (TCXO) is often used for crystal frequency temperature compensation. Recently, an integrated digital TCXO (DTCXO) [1] that uses an on-chip PTAT sensor and a ΔΣ ADC interface was presented. However, this system's accuracy is limited by the proximity-induced temperature difference between the crystal and on-chip sensor. Moreover, the high converter latency (up to 0.1s) [2] imposed by the low bandwidth ΔΣ ADC degrades the system's frequency drift control capability in response to the temperature ramp. The temperature-sensing interface presented in this paper addresses these issues by using: (1) an in-situ crystal temperature sensor; (2) a digitally calibrated SAR ADC; (3) mixed voltage domain (2.5V/1V) SC front-end sampling to accommodate the ADC under a 1V supply; and (4) chopping and digital demodulation to reduce the 1/f noise.