High-Speed Photonic Integrated Chip on a Silicon Platform

As microprocessor technology advances toward multi-core and many-core architectures, optical interconnect is considered a promising way of meeting the associated demand for giga-scale and tera-scale input/output (I/O). While traditional optical communication systems demonstrate good performance, they are based on discrete components and are not suitable for computing applications, which require solutions with much lower cost and smaller size. Photonic integration, particularly when based on a silicon platform, has emerged as a key approach to realize the required low cost and small form factor optical transceivers. This chapter highlights a recent demonstration of a silicon photonic integrated chip that is capable of transmitting data at an aggregate rate of 200 Gb/s. It is based on wavelength division multiplexing where an array of eight high-speed silicon optical modulators is monolithically integrated with a demultiplexer and a multiplexer. This demonstration represents a key milestone on the way to fabricating terabit per second transceiver chips to meet the demand of future tera-scale I/O.