Hardware implementation of lossless image compression

A hardware implementation method for lossless image compression is proposed to overcome the difficulties of embedded wavelet coding methods in hardware implementation and high costs.Firstly,the algorithm divides wavelet coefficients into a low frequency block and three high frequency blocks according to sub-band properties,and then uses different methods to code respectively.In the low frequency block coding method,the Difference Pulse coding Modulation(DPCM) is firstly used to reduce coefficients' dynamic range.Then,a modified bit plane coding method is used to output the bit stream.In the high frequency block coding method,the proposed modified Set Partitioning in Hierarchical trees(MSPIHT) algorithm is used to code three high frequency blocks respectively with their thresholds.The MSPIHT optimizes the outputted bit stream by using a type of A set judge,reduces memory requirement and avoids memory dynamic management by eliminating the lists of SPIHT algorithm.Moreover,the MSPIHT avoids repeated calculation in scanning process and enhances the coding efficiency by adopting MMVS.Experiment results show that the bit-rates of all international standard testing images have reduced more than 1.4 bit/pixel and the coding speed has increased more than three times as compared with that SPHIT.It is concludes that the proposed algorithm is super in real-time performance,low memory requirement and fit for hardware implementation.