Bit-by-bit upset fault injection method specifically for SRAM (static random access memory) type FPGA (field programmable gate array)

The invention discloses a bit-by-bit upset fault injection method specifically for an SRAM (static random access memory) type FPGA (field programmable gate array). Single event upset sensitive positions in a configuration memory unit of a circuit design are detected to obtain dynamic upset sections and failure rate, a reliability change curve is drawn, and accordingly reliability of space application of the circuit design can be evaluated. The method includes a first step, realizing initial configuration; a second step, upsetting bits; a third step, judging whether fault is generated or not; a fourth step, judging whether a test is completed or not; and a fifth step, acquiring the dynamic upset section and the reliability change curve of the FPGA.