The effect of trench processing conditions on complementary bipolar analog devices with SOI/trench isolation

Trench processing conditions are optimized for manufacturability of complementary bipolar analog devices and are correlated to transistor I/sub ceo/ leakage and V/sub be/ matching characteristics. Cross-section SEM analysis, computer simulation, and Raman spectroscopy are used to characterize the stresses related to the SOI/trench/LOCOS structure.