Reduced Capacitor Stress Enhanced-Boost Improved-Z-Source Inverter

In this paper, the enhanced-boost improved-Z-source inverter (ZSI) with reduced capacitor stress is proposed. Similar to the enhanced-boost ZSI and enhanced-boost qZSIs with two switched-impedance networks, this proposed inverter topology possess very high voltage boost at low shoot-through duty ratio and high modulation index to provide better quality output waveform and reduce the semiconductor stress. In addition to this, the proposed topology provides less voltage across the capacitors. Accordingly, lower rating capacitors can be used to reduce the cost, size, and weight of the system. Moreover, akin to enhanced-boost qZSIs, this proposed topology is able to solve the problem of starting inrush current. This paper presents the operating principles and boost factor derivation of enhanced-boost improved ZSI and compares with conventional ZSI, SL-ZSI, enhanced-boost ZSI, and enhanced-boost qZSIs. Finally, the validation of theoretical analysis of the proposed inverter topology is verified in MATLAB/Simulink.