40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170 $^{\circ}$ C

2014 
First-ever 40-nm embedded split-gate MONOS (SG-MONOS) flash macros for automotive micro-controller unit (MCU) have been successfully developed. A SG-MONOS cell realizes high performance with low power consumption and intrinsically high data reliability thanks to the combination of split-gate and charge-trapping structure. In addition, newly developed circuit techniques greatly enhance the advantages of SG-MONOS cells and enable fast and reliable operations even at the junction temperature (Tj) of 170°C with small peripheral circuit area; 1) a sense amplifier with digital offset cancellation (SA-DOC) provides fast read operation over 160 MHz; 2) adaptable program current control scheme (APCCS) and intelligent erase scheme (IES) significantly decrease the program and erase time, which also results in improving the memory cells' reliability; and, 3) 3-D stacked unit capacitors achieve area-efficient charge pump. Two types of embedded flash (eFlash) macros with these technologies, code macro of 2 MB and data macro of 64 KB, were fabricated in a 40-nm eFlash process. The code macro demonstrates the capability of 160-MHz random read operation at Tj= 170°C, reaching 5.1 GB/s read throughput by simultaneous 256 bits read-out from two code macros. The data macro achieves the program/erase endurance over 10 million cycles at Tj= 170°C without any software-assisted techniques.
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