Reactor design for DC fault ride-through in MMC-based multi-terminal HVDC grids

An integrated design approach for the reactors used in multi-terminal HVdc (MTdc) grids based on the Modular Multilevel Voltage Source converters (MMC-VSC) technology is proposed in this paper. Arm reactors and dc limiting reactors are used to limit the rate of rise of currents in case of dc faults to protect the converter valves and allow more time for the dc breakers to isolate the faulty line within a grid. A mathematical model of the MMC and the dc grid is used for the analysis for the dc fault analysis and the reactor design. The reactor design is evaluated using a radially connected 3-terminal MTdc network. This analytical model is then used to investigate the most important dc fault protection design parameters, such as arm inductors and dc limiting reactors when using solid-state dc breakers. The main objective of the design procedure is to minimize the cost and mass of the required inductors, while maintaining control of the ‘healthy’ part of the dc grid at all times, during a dc fault.