A Novel Hierarchical Architecture Design for Secure Wireless Fieldbus Systems

The secure wireless fieldbus system faces error diffusion problem. When Advanced Encryption Standard (AES) adopted, even few errors in the channel spread, causing half of the data corrupted in an AES block. It significantly degrades the system reliability. In this work, we first design a new secure communication architecture to tackle the error diffusion effect, without compromising the system latency. Our novel hierarchical architecture is implemented in two dimensions. At the transmitting end, the first dimension performs encryption followed by short code encoding. Accompanying, a long code encoding is performed in parallel in the second dimension. While at the receiving end, the first dimension of the short code decoding and decryption, and the second dimension of the long code decoding are performed serially. Then, we conduct theoretical and practical analyses of error performance. Both theoretical and practical simulations show that our hierarchical architecture achieves a steeper bit error rate (BER) curve than the traditional architecture. At the BER of 10^(-6), the hierarchical architecture using (252,128) BCH in first dimension and (8128,7296) BCH / (8060,7040) LDPC in the second dimension achieves 0.25 / 1.3 dB performance gain than the traditional architecture only using (252,128) BCH code.