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Interconnect reliability test chip NIST 36: for development of measurement tools and standards
Interconnect reliability test chip NIST 36: for development of measurement tools and standards
1998
Hiroshi G. Okuno
Toshiharu Tominaka
Seitaro Fujishima
T. Mitsumoto
T. Kubo
Toshihiro Kawaguchi
J. W. Kim
Keiichi Ikegami
Naonori Sakamoto
S. Yokouchi
T.Morikawa
Takeshi Tanaka
A. Goto
Yoshihisa Yano
Keywords:
Electromigration
NIST
Chip
Electronic engineering
Engineering
Correction
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