On-Board SiC MOSFET Degradation Monitoring Through Readily Available Inverter Current/Voltage Sensors

In this paper, a monitoring method is proposed for SiC MOSFETs based power converter/inverter topologies. Device's drain current and drain-source resistance in the saturation region are selected as the aging precursors. By applying fixed low V gs within microseconds at system start-up, on-board SiC MOSFET degradation monitoring can be achieved by excluding device junction temperature effect. In this study, readily available inverter current and dc bus voltage sensors are used to measure drain-source resistance shift throughout device degradation, and no extra sensing circuit is required. In order to verify the proposed method, power cycling tests are applied to devices under test (DUT) to observe progressive degradation and corresponding parameter shifts. Based on the identified aging signatures, the effect of variables like saturation gate voltage, pulse duration on the proposed technique are evaluated and discussed by means of single pulse test. The proposed degradation monitoring method is then experimentally validated in the context of a 3-phase inverter for case study. It is shown in the experimental results that device drain-source resistance in saturation region shows increasing trend over aging, can be used to monitor progressive SiC MOSFET degradation within microseconds at system start-up.