Stress analysis of a leadless chip carrier soldered to a ceramic substrate

Cracks were observed between thick film (printed and fired) platinum/gold and the underlying ceramic substrate when leadless ceramic chip carriers (LCCC's) were soldered to such metallization and subsequently subjected to thermal cycling. These cracks had, in some instances, led to electrical failures in test circuits. Even though the thermal testing was over extended temperature ranges, there was concern about the reliability of this type of interconnection in use environments. Finite element stress analyses were employed to develop an understanding of the cause of these failures. Since LCCC assemblies are inherently three-dimensional, the first step in the analysis process was to determine the degree of complexity required for the geometric model. In this study, both two- and three-dimensional models were evaluated. The residual stresses developed during cooldown from the soldering temperature were calculated for the models. The results indicated that, for the assumed materials and loading, a two-dimensional generalized plane strain model adequately predicted the stress state in the assembly due to soldering and subsequent thermal cycling. After evaluating the stresses in the assembly, the next step was to determine the adhesion strength for the metallization. An experimental ribbon-pull test provided failure loads in the metallization. A three-dimensional stress analysis ofmore » the test was required, however, to relate failure loads to failure stress. The calculated stresses in the metallization layer of the assembly were approximately a factor of three less than the failure stress. Due to the brittle nature of the metallization and underlying ceramic substrate, some failures were thought to be possible. Several solder geometries were modeled to determine the effect of geometry modifications on the stress state. 9 refs., 15 figs.« less