Sub-10 nm silicon FinFET devices on SOI substrate made by block copolymer lithography

Block copolymer (BCP) lithography as a low-cost and simple process emerges to become an important patterning technique in microelectronic manufacturing. In this work, self-assembly of a triblock copolymer was used to prepare silicon nanowire FinFET devices on the SOI substrate. The original pattern was formed on the block copolymer layer via self-assembly, and then transferred to the Si layer by dry etching that stops at the interface of Si and box oxide. The minimum critical dimension of the device can be as small as 8 nm, and the performance is extensively evaluated. This type of FinFET device shows high transconductance (g m ) 150 µS, signifies extremely low off current (I OFF ) ~50 pA, and high on/off current ratio (I ON /I OFF ) up to 3×10 6 .