RF Integrated Inductor Designing and Parasitic Effects Analyzing

This paper analyzes the parasitic effect of an integrated inductor in CMOS RF IC and the effect of the layout parameter on inductors quality factor Q . By using the Matlab program the changing of quality factor with various resistivities of substrate, and thicknesses of the metal film and oxide is simulated. Also it analyzes the effect of various layout parameters in various application frequencies. In this paper several principles have been provided and confirmed by experiment.The results have a good agreement with the simulation result which indicating that this method and principles can be used as some guidelines on designing integrated inductor in CMOS RF IC.