Low-cost, high-voltage SiGe:C HBTs for a 0.18 μm BiCMOS Process

We present results of a SiGe:C HBT module transfer from a 0.25 μm (IHP) BiCMOS process to a 0.18 μm (Mikron) RF-CMOS baseline. Best possible parameter matching of three different HBT types with BV CEO values of 2.4 V, 4 V, and 7 V was a challenging task due to a 15 deg higher SD-RTA temperature of the 0.18 μm CMOS. Here, we focus on the high-voltage (7 V) device discussing two effects which result from further differences in the CMOS baselines. First, we deal with the particular importance of collector-substrate capacitance (C CS ) for the transistor f max . We show that about 20% gain in f max was obtained by preventing a C CS perimeter component. In result, HBTs are demonstrated showing f max of 90 GHz at 7V BV CEO . Second, we investigate whether adding the 1.5 MeV, NMOS isolation implant to the high-voltage HBT collector brings benefits for the transistor behavior.