Low switching losses devices architectures for power management applications integrated in a low cost 0.13/spl mu/m CMOS technology

This paper presents two power devices architectures designed for 20V and 10V power management switching applications, respectively, the separated drain MOSFET one and the drain extension MOSFET. Global losses are evaluated through R/sub on/*C/sub gg/ figure of merit. Electrical results bring forward the dummy gated separated drain MOSFET for 20V application and confirm the drain extension MOSFET as a serious competitor for 10V applications.