FPGA based architecture for real-time SAR processing with integrated motion compensation
2014
In this paper, an FPGA based hardware architecture for airborne real-time SAR image generation with integrated first-order motion compensation (MoCom) is presented. By sharing the same FPGA resources for image generation and correction of highly squinted flight path deviations, only marginal overhead in terms of additional hardware resources is required when compared to an implementation without resource sharing. The proposed architecture has been implemented and evaluated on a Xilinx Virtex-6 ML-605 Evaluation Kit for different flight path deviation and squint parameter settings. An average throughput rate of 25 MSamples/s (32-bit/sample) is reached while the FPGA resource allocation does not exceed 50% of the LUT slices (logic), 45% of the BRAM36 (memory) and less than 8% of the DSP48 slices.
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