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C-8-10 A High-Throughput SFQ Bit-Serial Floating-Point Multiplier Based on Systolic Architecture
C-8-10 A High-Throughput SFQ Bit-Serial Floating-Point Multiplier Based on Systolic Architecture
2007
Koji Obata
Takuya Furuta
Kazuyoshi Takagi
Naofumi Takagi
Keywords:
Floating point
Computer hardware
Multiplier (economics)
Architecture
Throughput
Computer science
floating point multiplier
Correction
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