Reducing Reflection Noise of Signal Trace Through Metal Planes with a Via Stub in a Thick Multilayered PCB Using High-Impedance Arc Traces

This work presents the reduction of reflection noise in signal trace routing through metal planes with a via stub in a thick multilayered PCB using high-impedance arc traces. The loading effect for signal trace routing through metal planes with a via stub is typically capacitive. Therefore, the high-impedance arc trace can be used to compensate for via impedance. The reduction can be observed in not only the frequency domain ( $S_{11}$ , returned loss) but also the time domain (TDR waveform). The inserted loss $(S_{21})$ with high-impedance arc traces is compared to that without.