Properties of Defect Traps in Triple-Stack InAs/GaAs Quantum Dots and Effect of Annealing

2004 
The electrical and optical properties of the defect traps, with and without annealing, in InAs/GaAs quantum dots (QDs) emitting at 1.3 µm are investigated by capacitance-voltage (C-V), deep-level transient spectroscopy (DLTS) and photoluminescence (PL). When increasing the InAs thickness to 3 ML, an abnormal temperature dependence of the C-V characteristic was observed in the triple-stack InAs/GaAs QD sample. This temperature dependence is attributed to the defect levels at 0.39 and 0.54 eV observed in DLTS. The level at 0.39 eV, found in the top GaAs barrier, is probably related to the relaxation-induced dislocations. The level at 0.54 eV is found close to the QD region. Rapid thermal annealing can reduce the concentrations of both levels. Comparing with PL result, which shows a blueshift of 140 meV and linewidth narrowing in the QD emission by annealing at 800°C, the level at 0.54 eV is speculated to be strain- or relaxation-related defects in the interface between the QDs and the barrier. Removal of this level by high-temperature RTA is important since this level lies close to the QDs and influences the optical quality of the QDs.
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