Evaluation of Plasma-Induced Stochastic Damage Creation in the Lateral Direction using pn Junction Structures

Currently, silicon-based ultra-large-scale integrated circuits (ULSIs) are widely used in electronic devices. High-performance and high-density ULSIs are realized by scaling down the feature sizes of field-effect transistors. To manufacture leading-edge electronic devices, such as three-dimensional (3D) NAND flash memories [1] and CMOS image sensors [2] , fabrication technologies with atomic-scale precision, such as plasma processing, are necessary. During plasma processing, undesirable defects are created inside the materials. Such defects are generally referred to as plasma-induced damages (PIDs) [3] . The degradation of material properties because of plasma exposure has become an issue of critical concern in advanced devices because PIDs do not naturally scale with device feature sizes. For example, defects resulting from plasma exposure increase the pn junction leakage current (dark current) in the silicon (Si) photodiode of CMOS image sensors [4] .