Development of commercial CMOS process-based technologies for the fabrication of smart accelerometers
1991
A process for the monolithic integration of micromechanical structures into a 3- mu m standard CMOS process has been developed. Anisotropic wet etching of silicon using the p/sup +/-etchstop technique on high boron doped epitaxial layers as well as the electrochemical etchstop technique at pn-junctions was combined with the IC process. Piezoresistive accelerometers with a monolithically integrated operational amplifier were fabricated. Measurements on the devices produced with the p/sup +/-etchstop technique showed mechanical stress problems and shifts in the electronic device parameters. In contrast, no influence on mechanical and electronic properties of the devices fabricated with the pn-junction etchstop technique was found. Smart accelerometers with electronic device parameters comparable to the standard CMOS process were successfully realized. >
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