Device and package level thermal modeling of GaAs Power Amplifiers

In this paper an accurate finite element modeling methodology for Gallium Arsenide (GaAs) Power Amplifier (PA) modules is presented. A device level finite element model is developed to simulate the thermal performance of a single HBT device accurately. This model can be used to evaluate the effects of different device parameters on thermal performance. The effect of metallization thickness on a device is presented with excellent measurement correlation. This model is also utilized as a super element used in package level simulations. Two different power amplifier designs, one on a Metal Lead Frame (MLF) package and another on a 4/spl times/4 mm Multi Chip Module (MCM) package are used as examples to illustrate the package level simulations. The simulation results for these two packages show good agreement with the experimental measurements.