Bottom etching method preventing etching of side wall of through-silicon-via

2014 
The invention discloses a bottom etching method preventing etching of the side wall of a through-silicon-via. Before bottom etching of deep holes in wafer level chip scale packaging, through covering a layer of dry film on the back surface of the wafer, and through a photolithographic process, hole bottoms of small holes are exposed, and the hole bottoms are etched, thereby effectively solving problems that the side wall of the deep hole in the wafer level chip scale packaging is etched, that the hole bottom has foreign matter residue, and that the surface material is severely etched. The method simplifies process, and improves product yield, and product reliability is effectively improved.
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