Parallel Type Modulator for QPSK and SQPSK Modulation in Advanced Technology

1989 
Design and hardware realisation of a parallel type QPSK/SQPSK modulator for a center frequency of 15 GHz and a bit rate of 300 Mbit/sec is described. Analytical expressions and calculations with respect to static phase and magnitude accuracy for the chosen topology are presented. The measured phase and amplitude balance are less than 1.60 and 0.2 dB at center frequency and ambient temperature. The encoder and driver circuit for the modulator was realised as a custom specific IC in a bipolar process with transit a frequency (fT) of 6 GHz. Typical rise and fall times for phase transitions are less than 400 ps and allow bit rates up to 700 Mbit/sec. Bit error rate was measured in a transponder test system and shows a degradation of 0.3 dB at a bit error rate of 10?6.
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