Old Web
English
Sign In
Acemap
>
Paper
>
Chip design of a field programmable VLSI processor using memory-based cells
Chip design of a field programmable VLSI processor using memory-based cells
2003
Ohsawa
Sakamoto
Hariyama
Kameyama
Keywords:
Bit-serial architecture
Field-programmable gate array
Data flow diagram
Very-large-scale integration
Computer science
Shift register
Computer hardware
Integrated circuit design
Lookup table
CMOS
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]