Back end design and implementation of resilient packet ring ASIC

Resilient packet ring (RPR) is a good capacity solution to next generation metropolitan area network (MAN). This paper introduces the back end design of RPR application specific integrated circuit (ASIC) designed independently by Department of Electronic Engineering of Tsinghua University. It draws a back end design flow chart and relates about three key techniques: simultaneous switching output (SSO), design for testability (DFT) and static timing analysis (STA). It makes a brief introduction to each technique. It discusses the ways to avoid SSO problems, to calculate scan chains number, to achieve qualified test pattern fault coverage, and to solve STA violations. In the end, it shows design results and layout figure.