Filling an internal voltage

A padding circuit for a semiconductor memory device comprising a bias generating unit that is adapted to generate a bias current, a frequency-controlled oscillator which is adapted to receive the bias current and to provide an oscillation output, and a pulse generator, which is adapted the oscillation output to receive and generate a first and a second pulse as a function of the oscillation output, wherein the second pulse is embedded in the first pulse and the first pulse causes the bias current generating unit is connected to a power supply, and the second pulse in a sample-and-hold circuit is fed, which is adapted to sense the bias current and to keep its value during the first pulse.