Micro-computer and a method of testing the same

The present invention at the board level, to implement the at-speed test of ASIC inside of the source synchronous interface. In A source synchronous interface with a connected plurality of micro computers with IC (ASIC), the feed side of the IC of the data, first, the flip-flop F1 and a flip-flop for synchronous clock transmission of data delivery F2 to enter test data. Next, PLL circuit 11 transmits an operation clock in actual operation, by delivering a clock signal, in accordance with the clock signal, the first flip-flop and the second flip-flop transmits the test data and synchronizing clock. On the other hand, the receiving side IC of the data, the flip-flop F3, F4 for data reception is, captures the test data sent from the flip-flop F1 according to the synchronous clock transmitted from the flip-flop F2.