Thermal distortion predictions of a silicon wafer during exposure in a SCALPEL tool

Lucent Technologies Bell Laboratories is developing a projection electron lithography system known as SCALPEL for post-optical lithography. SCALPEL employs a full die area patterned mask and a 0.25 mm imaging sub-field which is electronically scanned to provide a 3 mm long ''effective field'' area. This elemental image area is stitched to neighboring areas as mask and wafer stages make complementary motions. SCALPEL utilizes a typical 25 mA current of 100keV electrons. One issue of concern is the thermal distortion of the silicon wafer during exposure, due to power absorbed from the electron beam. This transient thermal expansion needs to be quantified to support the development of optimized writing strategies and associated correction. This paper presents a multi-level distortion characterization of a silicon wafer during exposure in a SCALPEL tool.