Old Web
English
Sign In
Acemap
>
Paper
>
Statistical logic cell delay analysis using a current-based model
Statistical logic cell delay analysis using a current-based model
2006
Fatemi
Nazarian
Pedram
Keywords:
Current (fluid)
Very-large-scale integration
Algorithm
Probability distribution
Reliability (semiconductor)
Logic gate
Statistical model
Lookup table
Computer science
Logic synthesis
Correction
Source
Cite
Save
Machine Reading By IdeaReader
3
References
5
Citations
NaN
KQI
[]