6.4: A Clockembedded Voltage Differential Signaling CVDS for the ChipOnGlass Application of TFTLCD

An intrapanel interface for the ChipOnGlass COG application is developed using a Clockembedded Voltage Differential Signaling CVDS. The proposed interface adopts an embedded clock scheme to eliminate the skew between data and clock signals. The transmitter and receiver for the proposed interface are equipped with the transition compensator and equalizer to overcome the frequency limitation caused by highly resistive LineOnGlass LOG of the COG application. The maximum data rate per pair is measured as high as 780Mbps at the prototype with the refresh rate up to 105Hz. The proposed interface achieves low electromagnetic interference EMI and low power consumption. The power consumption of the proposed interface is reduced by 50% compared to the conventional interfaces for the COG application.