On-board computer space environment event fault tolerance method

The invention relates to an on-board computer space environment event fault tolerance method, which mainly comprises memory single particle turning processing, chip internal register change tolerance caused by space radiation and partial circuit failure fault tolerance caused by space radiation. For the memory single particle turning, an on-board computer regularly carries out fault tolerance on the memory region reading and writing through the error detection and correction (EDAC) checking addition to a memory region. For the chip internal register change caused by space radiation, the on-board computer protects unused interruption; for a work mode register, the regular routing inspection is adopted, the re-initialization is carried out when the value is not the expected value; and for a register relevant to the bus message sending, the value giving is carried out on the memory again before the message sending in each time. For the partial circuit failure caused by the space radiation, the fault random-access memory (RAM) chip replacement, the bus interface chip fault detection and switching and the central processing unit (CPU) chip fault detection and switching are adopted for fault tolerance. The method provided by the invention has the advantage that the on-board computer emission and in-orbit operation reliability of the on-board computer can be effectively improved.