SRAM cell with asymmetric pass-gate nMOSFETs for embedded memory applications

A novel asymmetric static RAM (SRAM) cell is fabricated on planar silicon-on-insulator CMOS technology, in which pass-gate (PG) transistors are asymmetric. Since lightly doped drain structure of PG transistors use only gate-to-source, this cell improves read stability by 43% when compared with the conventional SRAM 6T symmetric cell. Additionally, cell-leakage current reduces by 24% also due to the PG transistor gate-to-drain underlap design. Although it needs more current to write data to storage node, but no more voltage is needed based on measurements. The novel cell is still suitable for embedded memory.