ResearchArticle An Evaluation of Dynamic Partial Reconfiguration for Signal and Image Processing in Professional Electronics Applications

Correspondence should be addressed to Philippe Manet,philippe.manet@uclouvain.beReceived 29 February 2008; Revised 11 July 2008; Accepted 3 November 2008Recommended by Guy GogniatSignal and image processing applications require a lot of computing resources. For low-volume applications like in professionalelectronics applications, FPGA are used in combination with DSP and GPP in order to reach the performances required bythe product roadmaps. Nevertheless, FPGA designs are static, which raises a flexibility issue with new complex or softwaredefined applications like software-defined radio (SDR). In this scope, dynamic partial reconfiguration (DPR) is used to bringa virtualization layer upon the static hardware of FPGA. During the last decade, DPR has been widely studied in academia.Nevertheless, there are very few real applications using it, and therefore, there is a lack of feedback providing relevant issues toaddress in order to improve its applicability. This paper evaluates the interest and limitations when using DPR in professionalelectronicsapplicationsandprovidesguidelinestoimproveitsapplicability.Itmakesafairevaluationbasedonexperimentsmadeonasetofsignalandimageprocessingapplications.ItidentifiesthemissingelementsofthedesignflowtouseDPRinprofessionalelectronics applications. Finally, itintroducesafastreconfiguration manager providingan 84-timeimprovement compared tothevendor solution.Copyright © 2008 Philippe Manet et al. This is an open access article distributed under the Creative Commons AttributionLicense, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properlycited.