Modeling and Simulation of Narrowband Gap Semiconductor Indium Antimonide (InSb) Based MOSFET

hole mobility reported is 800 cm 2 V -1 s -1 , this makes fast devices based on InSb possible. In our research we have used two separate mobility models to study the mobility field dependency. The Philips unified mobility model is used to make a channel comparison with silicon MOSFET, assuming in InSb the electron and hole mobility has the similar field dependence as in silicon. The DC simulation result of a NMOS transistor with gate length of 200nm is shown in Fig.3. The drain current of InSb NMOS is almost twice as high as the drain current of Si NMOS showing the high current driving capability of InSb MOSFET. The Canali high-field saturation model is used later to adapt to Hydrodynamic mode of transport equations, the DC simulation result of the same device is shown in Fig.4, which shows even better current driving capability of InSb based NMOS due to the high mobility of InSb. And the negative resistance is shown in Fig4, this shows the appropriate mobility modeling method has accounted for the transfer electron effect which is commonly seen in device based on III-V compound semiconductor materials. The scaling effect of InSb based planar MOSFETs have also been simulated, the drain current versus gate voltage at 1 volt drain bias is shown in Fig. 5. The silicon based devices are also simulated for comparison. Both off state leakage current and turn on current of InSb MOSFETs is much higher than that of silicon devices as shown in Fig.6. The high turn on current is due to high mobility of InSb. High off state leakage current however is because InSb has large intrinsic carrier density (ni =1.9×10 16 cm -3 ) which is six order of magnitude higher than that of silicon. Several techniques have been demonstrated to reduce leakage current of InSb based devices, such as exclusion and extraction [4], electromagnetic carrier depletion [10], low temperature operation etc. From Fig.6, both leakage current of Si and InSb devices increase as the device scales down, but leakage current for InSb NMOS shows a less increasing rate than silicon NMOS as the device scales, which shows the InSb devices might have the similar leakage current as silicon device in sub 50nm regime. A traditional method to reduce off state leakage current of InSb device is device cooling as shown in Fig.7. At 200K the InSb NMOS has more than two orders of magnitude less leakage current. Fig.8 shows the DIBL and transconductance affected by device scaling for both InSb and Si. The InSb devices have larger DIBL for sub 100nm device sizes, and have similar