Wafer level chip size package and a manufacturing method interconnects

A method of forming a wafer level chip size package interconnect comprising: on a substrate after forming the passivation interconnect (PPI) layer; forming interconnects on PPI layer; and releasing the molding compound on the substrate, the flow molding plastic to interconnect the transverse seal portion. Example embodiments relate to interconnects wafer level chip size package and a manufacturing method of the present invention.