From real-time emulation to ASIC integration for image processing applications

A methodology for automatically deriving image processing ASICs from their real-time emulation on the data-flow functional computer is presented. The aim of the method is to reduce the time and effort required to synthesize and validate ASICs after emulation. This is achieved by optimizing the architecture validated on the emulator and integrating the optimized resources. The paper presents the derivation of a 1100 MIPS defect detector.