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Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations
Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations
2019
Jiafei Zhao
Rongkun Jiang
Hao Yang
Xuetian Wang
Hongmin Gao
Keywords:
Radar
Computer science
Reconfigurable computing
Computer hardware
Detector
Architecture
Implementation
Constant false alarm rate
Electronic engineering
Field-programmable gate array
fpga implementations
reconfigurable hardware architecture
cfar detector
Correction
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