Impact of interconnect capacitance reduction on RF-Si device performance

Ultra-low noise characteristics have been obtained in deep-sub-micron Si MOSFETs and Si MMICs by the new low-capacitance interconnect technique using polyimide inter-level dielectrics. The key issue is how to suppress the influence of interconnect parasitics due to the Si substrate. We have achieved 0.13 /spl mu/m Si nMOS with NF/sub min/ of 0.26 dB at 2 GHz and 6 GHz Si LNA with NF (50 /spl Omega/) of 2.2 dB and gain of 16.2 dB.