FPGA built-in dual port memory test method

2008 
The invention discloses a testing method of a storage with embedded double ports of an FPGA, which configures all the storages with the embedded double ports of the FPGA into the same one of the optional working modes, and leads the inputs of the same ports to be parallelly connected together so as to be used as a common input end; when in testing, the March C algorithm is adopted to alternately test two ports, and a combinatorial vector is simultaneously applied to the two ports so as to carry out the relevance failure testing of the two ports, thus judging the correctness of storage output. The testing method effectively finishes the testing of the storage with the embedded double ports of the FPGA, achieves the testing coverage of 100 percent, reasonably utilizes free resources in the FPGA as examination logics, simplifies debugging process, decreases input and output ports and greatly improves testing efficiency.
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