Degradation mechanism during gate stress at high electrical field on high voltage MOSFET for non-volatile memory applications

In this paper, gate stress at high electrical field has been studied on High Voltage MOSFETs used for Non-Volatile Memory applications. Charge pumping measurements and characteristic Capacitance-Voltage have been applied to demonstrate that degradation mechanism of n- and p-channel transistors is firstly due to charge fixed trapping by Anode Hole Injection, and then dependent on where electrons are injected, i.e. from gate or from substrate. Furthermore, low activation energy has been found for positive stress on n- and p-MOSFETs.