Wideband LNA Noise Matching

A new method for designing wideband noise- and power-matched source-degenerated cascode LNAs is presented. At the core of the method is the selection of transistor size and biasing that simultaneously minimize the difference between the LNA noise factor and the minimum noise factor, as well as reduce the sensitivity of that difference to frequency. An experimental demonstration of the method is presented with a 0.13- $\mu \text{m}$ CMOS LNA exhibiting < −12-dB S11, 10-dB of gain, and <2.5-dB NF, which remains within 2.8% of the minimum noise figure, from 4 to 8 GHz while consuming 12.8 mW of power.